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 Cascadable Silicon Bipolar MMIC Amplifier Technical Data
MSA-0900
Features
* Broadband, Minimum Ripple Cascadable 50 Gain Block * 8.0 0.2 dB Typical Gain Flatness from 0.1 to 4.0 GHz * 3 dB Bandwidth: 0.1 to 6.0 GHz * Low VSWR: 1.5:1 from 0.1 to 4.0 GHz * 11.5 dBm Typical P1dB at 1.0 GHz
The MSA-series is fabricated using HP's 10 GHz fT, 25 GHz f MAX, silicon bipolar MMIC process which uses nitride self-alignment, ion implantation, and gold metallization to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400C and either wedge or ball bonding using 0.7 mil gold wire. This chip is intended to be used with an external blocking capacitor completing the shunt feedback path (closed loop). Data sheet characterization is given for a 45 pF capacitor. Low frequency performance can be extended by using a larger valued capacitor.[1]
Chip Outline[1]
Description
The MSA-0900 is a high performance silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for very wide bandwidth industrial and military applications that require flat gain and low VSWR.
Note: 1. Refer to the APPLICATIONS section "Silicon MMIC Chip Use" for additional information.
Typical Biasing Configuration
R bias (Required) C Fbl VCC > 12 V
RFC (Optional) 4 C block 3 IN 1
MSA
C block OUT Vd = 7.8 V
2
5965-9548E
6-430
AK
MSA-0900 Absolute Maximum Ratings
Parameter Device Current Power Dissipation[2,3] RF Input Power Junction Temperature Storage Temperature Absolute Maximum[1] 80 mA 750 mW +13 dBm 200C -65 to 200C Thermal Resistance[2,4]: jc = 70C/W
Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. TMounting Surface (TMS) = 25C. 3. Derate at 14 mW/C for TMounting Surface > 148C. 4. The small spot size of this technique results in a higher, though more accurate determination of jc than do alternate methods.
Electrical Specifications[1], TA = 25C
Symbol
GP GP f3 dB VSWR NF P1 dB IP3 tD Vd dV/dT
Parameters and Test Conditions[2]: Id = 35 mA, ZO = 50
Power Gain (|S21| 2) Gain Flatness[3] 3 dB Bandwidth[3,4] Input VSWR Output VSWR 50 Noise Figure Output Power at 1 dB Gain Compression Third Order Intercept Point Group Delay Device Voltage Device Voltage Temperature Coefficient f = 1.0 to 4.0 GHz f = 1.0 to 4.0 GHz f = 1.0 GHz f = 4.0 GHz f = 1.0 GHz f = 4.0 GHz f = 1.0 GHz f = 1.0 GHz f = 0.1 GHz f = 0.1 to 4.0 GHz
Units
dB dB GHz
Min.
Typ.
8.0 0.2 6.0 1.4:1 1.5:1
Max.
dB dBm dBm psec V mV/C 7.0
6.0 6.5 11.5 6.5 23.0 60 7.8 -16.0 8.6
Notes: 1. The recommended operating current range for this device is 25 to 45 mA. Typical performance as a function of current is on the following page. 2. RF performance of the chip is determined by packaging and testing 10 devices per wafer. 3. The value is the expected achievable performance for the MSA-0900 used with an external 45 pF capacitor mounted in a 100 mil stripline package. 4. Referenced from 0.1 GHz gain (G P).
Part Number Ordering Information
Part Number MSA-0900-GP4 Devices Per Tray 100
6-431
MSA-0900 Typical Scattering Parameters[1,2] (ZO = 50 , TA = 25C, Id = 35 mA)
Freq. GHz S11 Mag Ang dB S21 Mag Ang dB S12 Mag Ang Mag S22 Ang k
0.02 0.05 0.1 0.2 0.4 0.6 0.8 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
.32 .22 .11 .10 .10 .09 .08 .08 .07 .07 .08 .12 .17 .22 .27 .32 .34 .36 .38 .39
-107 -143 -144 -160 -171 -170 -171 -170 -166 -138 -131 -119 -125 -132 -140 -149 -154 -158 -158 -157
10.8 8.6 8.2 8.1 8.1 8.1 8.2 8.3 8.6 8.9 9.3 9.6 9.6 9.1 8.4 7.5 6.4 5.3 4.2 3.2
3.48 2.70 2.57 2.54 2.54 2.55 2.57 2.59 2.68 2.80 2.92 3.01 3.02 2.86 2.64 2.36 2.09 1.84 1.62 1.45
151 164 171 172 175 166 162 158 147 136 126 112 95 78 63 50 38 29 22 15
-13.9 -13.6 -13.3 -13.5 -13.4 -13.3 -13.3 -13.1 -13.1 -12.6 -12.6 -12.0 -11.8 -11.5 -11.5 -11.4 -11.3 -11.3 -11.4 -11.5
.203 .209 .215 .211 .215 .216 .216 .220 .221 .234 .236 .250 .256 .265 .265 .268 .272 .272 .271 .267
17 6 3 1 2 1 1 1 1 1 1 1 -1 -3 -5 -6 -6 -6 -6 -6
.32 .22 .11 .10 .10 .10 .11 .11 .14 .15 .18 .21 .22 .19 .16 .12 .10 .10 .16 .23
-106 -142 -142 -158 -166 -166 -166 -167 -172 -172 179 171 157 144 138 138 162 -166 -151 -147
0.83 1.09 1.16 1.19 1.18 1.18 1.17 1.15 1.12 1.07 1.04 0.99 0.97 0.96 0.97 1.00 1.02 1.07 1.12 1.17
Notes: 1. S-parameters are de-embedded from 100 mil BeO package measured data using the package model found in the DEVICE MODELS section. 2. S-parameter data assumes an external 45 pF capacitor. Low fequency performance can be extended using a larger valued capacitor.
6-432
Typical Performance, TA = 25C
(unless otherwise noted)
18 15 12
G p (dB) P1 dB (dBm)
9 0.1 GHz 1.0 GHz, 1.0 GHz, 4.0 GHz 4.0 GHz
13 12 11 P1 dB
Gp (dB)
8
7 9 6 3 0 .02 Open Loop Closed Loop 0.1 0.3 0.5 1.0 3.0 6.0 5 6.0 GHz
NF (dB) Gp (dB)
8 GP 7
6 7 6 5 4 -55 -25 +25 +85 +125 NF
4 10 20 30 40 I d (mA) 50 FREQUENCY (GHz)
TEMPERATURE (C)
Figure 1. Typical Power Gain vs. Frequency, Id = 35 mA.
Figure 2. Power Gain vs. Current.
Figure 3. Output Power at 1 dB Gain Compression, Noise Figure and Power Gain vs. Case Temperature, f = 1.0 GHz, Id = 35 mA.
P1 dB (dBm)
15 12 9 6 I d = 45 mA I d = 35 mA I d = 25 mA 7.0 6.5 6.0 0.1 0.2 0.3 0.5 1.0 2.0 5.5 4.0
NF (dB)
FREQUENCY (GHz)
Figure 4. Output Power at 1 dB Gain Compression and Noise Figure vs. Frequency.
MSA-0900 Bonding Diagram
Capacitor (45 pF typ) 4 MSA Die 2 1 Input Trace
Numbers refer to pin contacts listed on the Chip Outline.
A09
MSA-0900 Chip Dimensions
Ground Output Trace (3) OUTPUT (BACKSIDE CONTACT) (2) GROUND
2 53 (backside contact) Ground
(4) BONDPAD FOR FEEDBACK CAPACITOR
AK
335 m 13.2 mil
(1) INPUT
450 m 17.7 mil
OPTIONAL TOPSIDE (5) OUTPUT[1]
6-433
Unless otherwise specified, tolerances are 13 m/0.5 mils. Chip thickness is 114 m/4.5 mil. Bond Pads are 41 m/1.6 mil typical on each side. Note 1: Output contact is made by die attaching the backside of the die.


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